【Product description】

Silicon Heterojunction Technology (HJT) is based on an emitter and back surface field (BSF) that are produced by low temperature growth of ultra-thin layers of amorphous silicon (a-Si:H) on both sides of very well cleaned monocrystalline silicon wafers, less than 160 μm in thickness, where electrons and holes are photogenerated.

HJT solar cell structure 400 Profile2

【Process flow】

Process flow A black

【Key features】

High Eff and high Voc

Low temperature coefficient 5-8% power output gain

Bifacial structures

【Key features】

High Efficiency and high Voc

Low temperature coefficient 5-8% power output gain

Bifacial structures

【Technical Data】

TECHNICAL DATA AND DESIGN		TEMPERATURE COEFFICIENTS AND SOLDERABILITY
Dimension	166mm*166mm±0.25	TkUoc (%/K)	-0.192
Thickness	150+20 μm/-10 μm	TkIsc (%/K)	+0.035
Front	9×0.1mm Welding spot type front electrode	TkPMAX (%/K)	-0.236
Back	9×0.1mm Welding spot type back electrode	Peel Strength Minimum	>1.4N/mm

ELECTRICAL PARAMETERS at STC
No.	Efficiency (%)	Pmpp (W)	Uoc (V)	Isc (A)	Umpp (V)	Impp (A)	FF (%)
1	24.40	6.69	0.746	10.758	0.644	10.386	83.35
2	24.30	6.66	0.746	10.754	0.644	10.352	83.10
3	24.20	6.63	0.745	10.750	0.643	10.318	82.84
4	24.10	6.61	0.745	10.745	0.643	10.282	82.56
5	24.00	6.58	0.744	10.740	0.642	10.245	82.27
6	23.90	6.55	0.744	10.728	0.642	10.210	82.06
7	23.80	6.52	0.744	10.716	0.641	10.175	81.84
8	23.70	6.50	0.744	10.683	0.642	10.124	81.76
9	23.60	6.47	0.744	10.649	0.642	10.072	81.67
10	23.50	6.44	0.743	10.628	0.640	10.072	81.64
11	23.40	6.41	0.741	10.607	0.637	10.072	81.61
12	23.30	6.39	0.741	10.602	0.635	10.058	81.35
13	23.20	6.36	0.740	10.596	0.633	10.043	81.09
14	23.10	6.34	0.741	10.563	0.635	9.979	80.88
15	23.00	6.31	0.742	10.530	0.636	9.914	80.67
16	22.90	6.28	0.742	10.504	0.635	9.890	80.57
17	22.80	6.25	0.742	10.477	0.634	9.865	80.46
18	22.70	6.23	0.741	10.488	0.632	9.850	80.18
19	22.60	6.20	0.739	10.499	0.630	9.834	79.89
20	22.50	6.17	0.738	10.496	0.629	9.809	79.72
21	22.40	6.14	0.736	10.493	0.628	9.784	79.54